Google redesigns its AI chip architecture for the agentic era as Samsung workers stage the largest labor protest in the company's history, threatening HBM supply heading into peak AI buildout season.
🗄️ Google Unveils 8th-Gen TPUs Split Into Dedicated Training and Inference Chips
Decoded: Google announced its eighth-generation Tensor Processing Units at Cloud Next 2026, departing from a single general-purpose chip to two purpose-built designs: the TPU 8t (training) and the TPU 8i (inference). The TPU 8t is optimized to reduce frontier AI model training time from months to weeks. Its server pods house 9,600 chips sharing two petabytes of high-bandwidth memory and scale linearly to a single logical cluster of up to one million chips — a scale previously impossible with prior-generation interconnects. The TPU 8i is tuned for low-latency agentic inference workloads. Google simultaneously rebranded its enterprise AI stack under the name Gemini Enterprise, consolidating Vertex AI and related cloud tools. Google said the generation shift was driven by the structural difference between generative AI tasks and autonomous AI agent tasks, which require sustained, low-latency reasoning loops rather than batch generation. (Ars Technica, Reuters, April 23, 2026)
Why it matters: Google's decision to split training and inference into distinct silicon architectures is a direct challenge to Nvidia's H100/B200 dominance, which uses a single GPU for both workloads. If Google's inference-optimized TPU 8i delivers materially better tokens-per-watt in agentic workflows — the fastest-growing AI compute category — it reduces the addressable market for Nvidia's future inference-focused chips. The one-million-chip linear scaling claim for the TPU 8t, if validated externally, would also set a new bar for training cluster economics. Alphabet (GOOGL) runs one of the largest AI inference fleets globally through Google Search, Gemini, and Google Cloud; any structural cost advantage in running agentic workloads flows directly to its AI margin profile against AWS and Azure.
🗄️ 40,000 Samsung Workers Stage Largest-Ever Protest, Threaten 18-Day Strike That Could Hit HBM Output
Decoded: An estimated 40,000 Samsung Electronics workers — the largest protest in the company's history — rallied at its Pyeongtaek semiconductor complex on April 22, demanding higher bonus pay on par with rival SK Hynix. Unions have set a deadline: if compensation demands are not met, workers plan to strike for 18 consecutive days beginning May 21. Workers cited a widening pay gap driven by SK Hynix's early dominance in supplying high-bandwidth memory to Nvidia, which generated significantly higher bonus payouts. Union representatives said employees are actively leaving Samsung for SK Hynix. Samsung's profits have also surged to record levels on AI chip demand, which workers say has not been reflected in their compensation. A prolonged strike at Pyeongtaek, Samsung's primary advanced memory production site, could delay HBM and DRAM shipments to AI customers including Nvidia, AMD, and major hyperscalers. (Reuters, Bloomberg, April 22-23, 2026)
Why it matters: Samsung's Pyeongtaek complex is the production site for its most advanced DRAM and HBM output. An 18-day walkout beginning May 21 would arrive at peak AI infrastructure build season — precisely when hyperscalers are accelerating GPU cluster deployments ahead of mid-year capacity targets. Samsung is currently in HBM3E qualification at Nvidia and fighting to reclaim market share lost to SK Hynix; a production disruption extends that timeline and further concentrates HBM allocation risk at SK Hynix. For Micron (MU), a Samsung supply disruption is a potential pricing tailwind. For Nvidia (NVDA), it adds another HBM constraint variable on top of already tight allocation — a risk to GPU system build schedules that investors have largely not priced.
Stay decoded. See you tomorrow.
— The Get AI Decoded Team
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